![]() ![]() Engelbrecht, “Swarm Tetris: applying particle swarm optimization to Tetris,” In Proc. Zhou, “Necessary and sufficient conditions to perform spectral Tetris,” Journal of Linear Algebra Applications, vol. Liben-Nowell, “Tetris is hard, even to approximate,” Journal of Computational Geometry and Applications, vol. Epstein, “On two dimensional packing,” In Proc. ![]() Second PacificAsia Conference on Circuits, Communications and System (PACCS)’10, 2010, pp. Xie, “Design of visual based-FPGA Ping-Pang game with multi-models,” In Proc. Federated Conference on Computer Science and Information Systems (FedCSIS)’14, 2014, pp. Gontean, “Pong game on FPGA with CRT or LCD display and push button controls,” In Proc. International Conference on Field Programmable Technology (FPT)’15, 2015, pp. ![]() Watanabe “FPGA Trax Solver based on a neural network design,” In Proc. The 17th CSI International Symposium on Computer Architecture & Digital Systems (CADS)’13, 2013, pp. Eskandari, “Blokus Duo game on FPGA,” In Proc. International Conference on Field-Programmable Technology (FPT)’13, 2013, pp. Watanabe, “FPGA Blokus Duo Solver using a massively parallel architecture,” In Proc. IEEE International Conference on Consumer Electronics (ICCE)’16, 2016, pp. Watanabe, “Full FPGA game machine,” In Proc. International Conference on Field-Programmable Technology (FPT)’11, 2011. Fahmy, “A threat-based Connect6 implementation on FPGA,” In Proc. Watanabe, “An FPGA Connect6 Solver with a two-stage pipelined evaluation,” In Proc. 2nd International Conference on Consumer Electronics, Communications and Networks (CECNet)’12, 2012, pp. Zhu, “Tetris game design based on the FPGA,” In Proc. International IEEE Consumer Electronics Society's Games Innovations Conference’09, 2009, pp. Bigioi, “FPGA based stereo imaging system with applications in computer gaming,” In Proc. Lenox, “FPGA based front-end electronics for a high resolution PET scanner,” IEEE Transactions on Nuclear Science, vol. Jeon, “FPGA Design and Implementation of a Real-Time Stereo Vision System,” IEEE Transactions on Circuits and Systems for Video Technology, vol. IEE Vision, Image and Signal Processing’05, 2005, pp. Bouridane, “FPGA implementations of fast Fourier transforms for real-time signal and image processing,” In Proc. IEE Vision, Image and Signal Processing’00, 2000, pp. Benkrid, “Design and implementation of a high level programming environment for FPGA-based image processing,” In Proc. ![]() Crookes, “Parallel architectures for image processing,” Electronics and Communication Engineering Journal, vol. Mota, “FPGA-based real-time optical-flow system,” IEEE Transactions on Circuits and Systems for Video Technology, vol. Savaria, “Reconfigurable pipelined 2-D convolvers for fast digital signal processing,” IEEE Transactions on VLSI Systems, vol. IEEE Computer Society Conference on Computer Vision and Pattern Recognition’98, 1998, pp. Perona, “Real-time 2-D feature detection on a reconfigurable computer,” In Proc. Villasenor, “The flexibility of configurable computing,” IEEE Signal Processing Magazine, vol.15, no. Sistem olarak Altera DE0 geliştirme ve eğitim kiti kullanılmıştır ancak yazılan kodda yalnız standart VHDL fonksiyonları kullanıldığından kod diğer FPGA kitleri üzerinde de çalışabilmektedir. Oyun kodu VHDL donanım tanımlama dilinde yazılmıştır. Bu şema ile, ilgili karo içindeki piksellerin tamamı için 1-bit bilginin tutulması yeterli olduğundan kod tasarımı oldukça kolaylaşmakta ve aynı zamanda kodun hızlı çalışması sağlanmaktadır. Kodun yazımında karo-haritalamalı şema denilen, bir grup pikselin tamamını bir karo olarak tanımlayan bir haritalama kullanılmaktadır. Bu tasarımın özgün yanı, şimdiye kadar bu konuda yapılmış birçok çalışmadan üstün olarak, tasarlanan kodun veri tutma işlemi için herhangi bir SRAM modülü kullanmamasıdır. Bunun için, FPGA kiti üzerinde bağımsız olarak çalışan, VHDL donanım tanımlama dilinde orijinal bir Tetris oyun kodu tasarlanmıştır. Bu çalışmada, bir FPGA geliştirme ve eğitim kiti üzerinde tam gömülü olarak çalışan bir Tetris oyun kodu gerçeklemesi yapılmıştır. ![]()
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